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EL6201
Data Sheet August 2, 2007 FN7216.3
Low Power 430MHz HFM Oscillator with Disable
The EL6201 is a solid state high performance laser modulation oscillator with external resistor adjustable frequency and amplitude. The EL6201 is available in both the 8 Ld MSOP and the 5 Ld SOT-23, to enable device placement close to the laser for reduced EMI. The oscillator frequency is set by connecting a single external resistor from the RFREQ pin to ground. The oscillator current output amplitude is set by connecting a single external resistor from the RAMP pin to ground. The oscillator in the MSOP package also contains a high speed output disable function using the OE pin. The OE pin can be driven by a high speed timing signal to control precise laser modulation during read/write operations. The output current is disabled when a logical zero `L' is driven to the CE pin. Supply current is reduced to microamps when CE = LOW. The EL6201 has internal supply bypass capacitors to reduce oscillation noise spread through supply connections.
Features
* Small SOT-23 and MSOP8 packages * Frequency to 430MHz min * Amplitude to 25mAP-P min * Output tristate function (MSOP8) * Power-down function (MSOP8) * Single +3.5V to +5.0V supply * Simple to use - only two external resistors required * Independent resistor setting for frequency and amplitude * Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
* DVD players * DVD-ROM drives * DVD-RAM drives * CD-RW drives
Ordering Information
PART NUMBER EL6201CY EL6201CY-T7* EL6201CY-T13* EL6201CYZ (Note) EL6201CYZ-T7* (Note) EL6201CYZ-T13* (Note) EL6201CW-T7* EL6201CW-T7A* EL6201CWZ-T7* (Note) PART MARKING G G G b b b L L BLAA PACKAGE 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP (Pb-free) 8 Ld MSOP (Pb-free) 8 Ld MSOP (Pb-free) 5 Ld SOT-23 5 Ld SOT-23 5 Ld SOT-23 (Pb-free) 5 Ld SOT-23 (Pb-free) PKG. DWG. # MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0038 MDP0038 MDP0038 MDP0038
* MO drives * Optical pickup head assembly * Laser diode modulation * Local oscillator * Communications lasers
Pinouts
EL6201 (5 LD SOT-23) TOP VIEW
1 VS 2 GND 3 IOUT RAMP 4 RFREQ 5
EL6201CWZ-T7A* BLAA (Note)
EL6201 (8 LD MSOP) TOP VIEW
1 CE 2 GND 3 RFRE 4 RAMP VS 8 IOUT 7 GND 6 OE 5
*Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2004, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
EL6201
Absolute Maximum Ratings (TA = +25C)
Voltages applied to: VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V RFREQ, RAMP . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V CE, OE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 to VCC
Thermal Information
Power Dissipation (maximum) . . . . . . . . . . . . . . . . . . . . See Curves Operating Ambient Temperature Range . . . . . . . . . . . 0C to +75C Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125C Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35mA Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications
VS = +5V, TA = +25C, CE = HI, unless otherwise specified. RAMP = 6.67k (IOUT = 8.5mA), RFREQ = 833 (FO = 330MHz) MIN (Note 1) MAX (Note 1) 27 30 6.5 1.5 11 -2.5 15 0 8.5 10.5 3.5 19 +2.5 0.8 2.4 CE or OE at 0V CE or OE at +5V 100 100
PARAMETER IS ISD ISTRI VLOAD IOUTP-P IOS VINL VINH IINL IINH
DESCRIPTION Supply Current (Enabled) Supply Current (Disabled) Supply Current (Tristated) Output Voltage Range Output Current Accuracy Output Current DC offset Logic Input Low Logic Input High Logic Low Input Current Logic High Input Current
CONDITIONS CE = HIGH, OE = LOW CE = LOW OE = HIGH Maximum IOUTP-P RAMP = 6.67k, IOUT = 2.5V to 3.0V
TYP 20
UNIT mA A mA V mA mA V V A A
AC Electrical Specifications
PARAMETER TCOSC FOSC FRANGE ARANGE TON, CE TOFF, CE TON, OE TOFF,OE Duty Cycle
VS = +5V, TA = +25C, RAMP = 6.67k, RFREQ = 833 CONDITIONS Measured from +25C to +125C die temperature 270 500 RFREQ 7k 30k RAMP 3k CE = Low to High CE = High to Low OE = Low to High OE = High to Low 40 80 7.5 300 10 10 10 52 60 MIN (Note 1) TYP 600 330 400 430 25 MAX (Note 1) UNIT ppm/C MHz MHz mAP-P ns ns ns ns %
DESCRIPTION Oscillator Temperature Coefficient Initial Oscillator Frequency Accuracy Oscillator Frequency Range Oscillator Amplitude Range EN Delay Time to 50% IOUT EN Delay Time to 50% IOUT OE Delay Time to 50% IOUT OE Delay Time to 50% IOUT
1. Parts are 100% tested at +25C. Over-temperature limits established by characterization and are not production tested.
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FN7216.3 August 2, 2007
EL6201 Typical Performance Curves
600 500 FREQUENCY (MHz) 400 300 200 100 0 0 1 2 3 4 5 RFREQ (k) IOUTp-p = 15mA TA = 25C FREQUENCY (MHz)
600 500 400 300 200 100 0 0 1 1000/RFREQ 2 3 IOUTp-p = 15mA TA = 25C
FIGURE 1. FREQUENCY vs RFREQ
FIGURE 2. FREQUENCY vs 1000/RFREQ
40 35 30 IOUTp-p (mA) 25 20 15 10 5 0 0 4 8 12 RAMP (k) 16 20 FO = 330MHz TA = 25C IOUTp-p (mA)
35 IDEAL 30 ACTUAL 25 20 15 10 5 0 0 50 75 100 125 150 175 200 427/RAMP (k) FO = 330MHz TA = 25C
FIGURE 3. IOUTp-p vs RAMP
FIGURE 4. IOUTp-p vs 427/RAMP
35 30 25 ISUPPLY (mA) 20 15 10 5 0 3.0 FO = 330MHz IOUTp-p = 15mA TA = 25C PDISS (mW)
180 160 140 120 100 80 60 40 20 0 3.0 FO = 330MHz IOUTp-p = 15mA TA = 25C
3.5
4.0
4.5
5.0
5.5
3.5
4.0
4.5
5.0
5.5
VSUPPLY (V)
VSUPPLY (V)
FIGURE 5. ISUPPLY vs VSUPPLY
FIGURE 6. DISSIPATION vs SUPPLY VOLTAGE
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EL6201 Typical Performance Curves
18 17 16 FREQUENCY (MHz) 15 IOUTp-p (mA) 14 13 12 11 10 9 8 3.0 3.5 4.0 4.5 5.0 5.5 260 250 3.0 FO = 330MHz RAMP = 6.5k TA = 25C 300 290 280 270 RFREQ = 833 IOUTp-p = 15mA TA = 25C
(Continued)
320 310
3.5
4.0
4.5
5.0
5.5
VSUPPLY (V)
VSUPPLY (V)
FIGURE 7. IOUTP-P vs VSUPPLY
FIGURE 8. FREQUENCY vs VSUPPLY
48.8 48.6 48.4 48.2 48.0 47.8 47.6 3.0 RFREQ = 833 RAMP = 6.5k TA = 25C
35
30 IOUTp-p = 15mA TA = 25C ISUPPLY (mA) 25
DUTY CYCLE (%)
20
15
10 3.5 4.0 4.5 5.0 5.5 0 100 200 300 400 500 VSUPPLY (V) FREQUENCY (MHz)
FIGURE 9. DUTY CYCLE (%) vs VSUPPLY
FIGURE 10. ISUPPLY vs FREQUENCY
180 160 DISSIPATION (mW) 140 120 100 80 60 0 100 200 300 400 500 FREQUENCY (MHz) IOUTp-p = 15mA VS = 5V TA = 25C
36 34 32 ISUPPLY (mA) 30 28 26 24 22 20 0 5 10 15 20 25 30 35 40 IOUTp-p (mA) RFREQ = 833 TA = 25C
FIGURE 11. DISSIPATION vs FREQUENCY
FIGURE 12. ISUPPLY vs IOUTp-p
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EL6201 Typical Performance Curves
58 56 54 DUTY CYCLE (%) 52 50 48 46 44 42 40 0 100 200 300 400 500 FREQUENCY (MHz) IOUTp-p = 15mA VS = 5V TA = 25C
(Continued)
0 -10 RELATIVE AMPLITUDE (dB) -20 -30 -40 -50 -60 -70 -80 -90 -100 340 345 350 355 360 365 RFREQ = 833 RAMP = 6.5k TA = 25C
FREQUENCY (MHz)
FIGURE 13. DUTY CYCLE vs FREQUENCY
FIGURE 14. OUTPUT SPECTRUM - WIDEBAND
28.0 27.5 27.0 ISUPPLY (mA) 26.5 26.0 25.5 25.0 24.5 24.0 0 25 50 75 100 125 DIE TEMPERATURE (C) FO = 330MHz IOUTp-p = 15mA IOUTp-p (mA)
20.5
20.0
RFREQ = 833 RAMP = 6.5k
19.5
19.0
18.5
18.0 0 25 50 75 100 125 DIE TEMPERATURE (C)
FIGURE 15. ISUPPLY vs DIE TEMPERATURE
FIGURE 16. IOUTp-p vs DIE TEMPERATURE
48.5 48.0 47.5 47.0 46.5 46.0 RFREQ = 833 RAMP = 6.5k FREQUENCY (MHz)
380 375 370 365 360 355 350 345 340 RFREQ = 833 RAMP = 6.5k
DUTY CYCLE (%)
45.5 0 25 50 75 100 125 DIE TEMPERATURE (C)
335 0 25 50 75 100 125 DIE TEMPERATURE (C)
FIGURE 17. DUTY CYCLE vs DIE TEMPERATURE
FIGURE 18. FREQUENCY vs DIE TEMPERATURE
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FN7216.3 August 2, 2007
EL6201 Typical Performance Curves
0.50 391mW 0.40 POWER DISSIPAION (W) POWER DISSIPAION (W) JA = 256C/W
(Continued)
SEMI G42-88 SINGLE LAYER TEST BOARD
0.60 0.50 0.40 0.30
SEMI G42-88 SINGLE LAYER TEST BOARD
486 mW JA = 206C/W
0.30
0.20
195mW
243mW 0.20 0.10 0.00
0.10
0.00 0 25 50 75 100 125 AMBIENT TEMPERATURE (C)
0
25
50
75
100
125
AMBIENT TEMPERATURE (C)
FIGURE 19. SOT23-5 POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 20. MSOP8 POWER DISSIPATION vs AMBIENT TEMPERATURE
Typical Application Circuit
+5V +5V 1 IDC 2 5 RFREQ
3 C*
4 RAMP
*Optional AC coupling
Applications Information
The EL6201 is designed to interface easily to laser diodes to break up optical feedback resonant modes and thereby reduce laser noise, but it is also generally useful as a 70MHz to 430MHz oscillator. The first applications section will focus on laser systems, and subsequent sections are of general topics.
and 60%, so the DC contribution from the EL6201 is only 5% of the peak-to-peak output. This will cause little perturbation of the diode's DC bias current. Although not necessary, capacitance coupling can be employed. A series capacitive reactance of less than 30 is recommended. A 20pF capacitor is thus appropriate at 330MHz. Benefits include no DC error current into the laser diode, and an attenuation of low-frequency noise from the EL6201. Disadvantages include perhaps 20% output AC current loss. While the diode AC impedance is generally in the low ohm range, any interconnect will create around 8nH per cm. of series inductance. Because the EL6201's output is an AC current source, higher load reactance due to series inductance will cause the EL6201's output voltage to swing more than what a direct connection to the diode would cause. At 400MHz and 15mAP-P output, just one cm. will generate 0.3VP-P of extra driver signal at the fundamental, and more at harmonic frequencies. The output current
Laser Diode Applications
The output of the EL6201 is composed of a sourcing and a sinking current source, switched alternately at the oscillator frequency. The output voltage compliance is VS to ground, with about 40 of series resistance. There is no severe squarewave distortion when the output voltage approaches the supply extremes, although the corners will be rounded. Being a current-source output, the output bias voltage is set by direct connection to the laser diode, which will appear as a low AC impedance with a DC voltage from 1.6V to 2.5V. Thus AC coupling from the EL6201 to the diode is unnecessary. The duty cycle of the output is between 40%
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FN7216.3 August 2, 2007
EL6201
waveform is a squarewave, and inductive loads can cause as much as 1V of overshoot. This does not mean that the current delivered to the diode has overshoot - just the voltage seen at the EL6201 output. Measurements show that the EL6201 output edge rate is about 300psec - a speed nearly impossible to deliver over practical interconnects to the diode. The L Series of Figure 22 must be carefully chosen. The goal is to get a series reactance of around 70 at 300MHz, so 40nH would suffice. The inductor should be shielded to reduce EMI and have no saturation effects at the supply currents drawn by the EL6201. Finally, there should be no self-resonance at the operating frequency or its harmonics. Also important is circuit-board layout. At the EL6201's operating frequencies, even the ground plane is not lowimpedance, and ground loops should be avoided. Figure 23 shows the output current loops:
RFREQ RAMP
SUPPLY BYPASS
SOURCING CURRENT LOOP
GND (8 Ld PACKAGE)
SINKING CURRENT LOOP
LOAD
FIGURE 21. OUTPUT CURRENT WAVEFORM - 1GHz BANDWIDTH
FIGURE 23. OUTPUT CURRENT LOOPS
General Considerations
EMI and Grounding
From an EMI point of view, the edge rate of the output current is much more important than that of the output voltage. The components are generally small and will be placed over a ground plane, so antenna effects that launch voltage-mode EMI are small. Measurement shows that a practical current edge rate is about 1ns, so interconnect should be over a ground plane and short to minimize inductively launched EMI. Most EMI seems to come from the supply wires connected to the diode/EL6201 board. The internal resistance and inductance of capacitors prevents perfect bypass action, and 150mVP-P noise on the lines is common. There needs to be a lossy series inductance and secondary bypass on the supply side to control signals from propagating down the wires. Alternatively, a series supply resistor can be used, which will also be useful in reducing EL6201 power dissipation. Figure 22 shows the typical connection.
L Series: 70 reactance at 300MHz (see text) VS EL6201 GND 0.1F Chip +5V 0.1F Chip
For the sourcing current loop, the current flows through the supply bypass capacitor. The ground end of the bypass thus should be connected directly to the EL6201 ground pin (output ground pin of the 8 Ld package). A long ground return path will cause the bypass capacitor currents to generate voltage drops in the ground plane of the circuit board, and other components (such as RAMP and RFREQ) will pick this up as an interfering signal. Similarly, the ground return of the load should be considered as noisy and other grounded components should not connect to this path. Slotting the ground plane around the load's return will eliminate adjacent grounded components from seeing the noise.
RFREQ and RAMP Interfaces
RAMP and RFREQ should be connected to the non-load side of the power ground to avoid noise pick-up. Figure 24 shows an equivalent circuit of these pins. VREF is roughly 0.35V for RFREQ and more accurately 1.17V for RAMP. The RAMP and RFREQ resistor should return to the EL6201's ground very directly lest they pick up highfrequency noise interference. They also should have minimal capacitance to ground. Trimmer resistors can be
FIGURE 22. RECOMMENDED SUPPLY BYPASSING
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FN7216.3 August 2, 2007
EL6201
used to adjust initial operating points, but they should be replaced with fixed resistors for further testing.
+ VREF -
RF Applications
The EL6201 can easily interface to reactive loads, and is adequate as a short-range modulated transmitter. Remembering that the output circuitry looks like current sources, impedance matching becomes a matter of transforming the load impedance to an appropriate load line for the EL6201. Also important is maintaining correct DC bias voltage on the output. Since the output will have a net DC current, capacitor coupling would allow the DC level to drift toward a supply rail and increase output harmonic products. In cases where such harmonics are important, Figure 25 shows coupling the EL6201 output to a 50 load:
EL6201 L IOUT C1 C2 50 LOAD 0.001F
PIN
FIGURE 24. RFREQ AND RAMP PIN INTERFACE
External voltage sources can be coupled to the RAMP and RFREQ pins to effect frequency or amplitude modulation or adjustment. It is recommended that a coupling resistor be installed in series with the control voltage and mounted directly next to the EL6201 pin. This will keep the inevitable high-frequency noise of the EL6201's local environment from propagating to the modulation source, and it will keep parasitic capacitance at the EL6201 pin minimized. Both inputs have several megahertz of bandwidth for analog modulation. The output enable pin can be used to pass digital modulation up to about 20Mbit/sec rates.
LCHOKE R2 R1
VS
FIGURE 25. TUNED INTERFACE TO 50 LEAD
Power Dissipation Considerations
Supply current can be predicted by Equation1:
12mA + I OUTp-p I S = ------------------------------------------------------------------------------------------------12 4 + ( V S - 1.6V ) x FREQ x 8 x 10 (EQ. 1)
Digital Clock Applications
The EL6201 can be used as a digital clock source. If unloaded, the output will simply traverse ground to VS. It is recommended that the VS supply be isolated from the main digital supply with an inductor or resistor, whose value is chosen to drop about 250mV. In this way logic noise can be isolated by the series component and the EL6201 local bypass. The rise- and fall-time of the output will be equal to VS/(CLOAD*IOUTP-P/2). The output current should be the smallest that can set an output rise-time, in the interest of lowest dissipation. The jitter is about 0.7% of period, RMS.
The 12mA quantity represents the operating DC current of the EL6201. This is also the current drawn from the supply during output disable. The IOUT quantity is based on a typical 50% duty cycle of output pull-up current, and the fact that the peak-to-peak output current is about twice the pullup or pull-down currents. The VS quantity is due to CV2F losses within the circuit, and the 8*10-12 quantity represents internal capacitances that must be slewed at the operating frequency. The 1.6V offset is a curve fit to measured data. The internal die temperature operating range is -40C to +125C. Internal temperature is equal to the ambient temperature plus power dissipated times the thermal resistance of the mounted package, JA. For a mounted MSOP-8 package, JA is 206C/W. The SOT-23 package has a JA of 256C/W.
Power-Down with the SOT-23 Package
The supply current of the EL6201 is low enough so that a logic output can simply provide the supply current of the part and effect power-down. This is most useful using the EL6201 in the SOT-23 package, which has no enable pin.
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FN7216.3 August 2, 2007
EL6201 SOT-23 Package Family
e1 A N 6 4
MDP0038
D
SOT-23 PACKAGE FAMILY MILLIMETERS SYMBOL A A1 SOT23-5 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 5 SOT23-6 1.45 0.10 1.14 0.40 0.14 2.90 2.80 1.60 0.95 1.90 0.45 0.60 6 TOLERANCE MAX 0.05 0.15 0.05 0.06 Basic Basic Basic Basic Basic 0.10 Reference Reference Rev. F 2/07 NOTES:
E1 2 3
E
A2 b c
0.20 C
0.15 C D 2X 5 e B b NX 1 2 3 2X 0.20 M C A-B D
D E E1 e e1 L L1 N
0.15 C A-B 2X C D
1
3
A2 SEATING PLANE 0.10 C NX A1
1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only).
(L1)
H
6. SOT23-5 version has no center lead (shown as a dashed line).
A
GAUGE PLANE c L 0 +3 -0
0.25
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FN7216.3 August 2, 2007
EL6201 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 10
FN7216.3 August 2, 2007

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